1. Field of the Invention
This invention relates to method for buffering clock skew, and, more particularly, to a method for buffering clock skew by using a logical effort.
2. Description of Related Art
Data in a digital circuit flow simultaneously in accordance with a clock signal. The clock signal may be skewed when the digital circuit operates in a low temperature environment. Therefore, how to diminish the clock skew effect generated because of the temperature variation is becoming one of the most popular research topics in the art.
U.S. Pat. No. 6,653,883 disclosed a clock tree buffering technique that may diminish the clock skew. The clock tree uses a temporary clock buffer to transmit a reference clock signal, in order to minimize the clock skew. In practice, a clock tree deskew circuit reduces the clock tree skew in repeated intervals over a period of time. The transmission of reference clock signal needs a great amount of layout, requires a lot of capacitors, and consumes much power. Therefore, the clock tree buffering technique has a very limited number of uses.
The IEEE proposed on February, 2009 a thesis, entitled “Design of Thermally Robust Clock Tree Using Dynamically Adaptive Clock Buffers,” which disclosed a clock deskew technique that can be applied to a clock tree. A clock buffer is installed in an operation voltage of one volt, and a temperature sensor is used to sense temperature information at different points of the clock tree. The clock buffer has a driving force that is adjusted in an analog manner according to the temperature information, so as to diminish the clock skew. However, a modern chip has to be applied to an extremely low voltage region of a near-threshold and sub-threshold, that is a moderate-inversion region or a weak-inversion region. The technique disclosed by the thesis is limited to an operation voltage of one volt, and can be applied to a strong-inversion region only. In other words, the technique cannot perform a clock buffering process on a clock tree operating in the near-threshold voltage or the sub-threshold voltage.
Therefore, how to provide a clock buffering technique that may be applied to a clock tree operating in the near-threshold voltage or the sub-threshold voltage is becoming one of the most popular topics in the art.